WORLDSEMICONDUCTOR CENTER

INTERACTIVE WAFER PLANNER

Make the assumptions.
See the effect.

Explore a simple wafer-to-good-die scenario. All inputs are illustrative and editable; no foundry pricing, yield or capacity is implied.

Your scenario

Effective die area should include your allowance for scribe lanes. Yield here is a single user-supplied aggregate die-yield assumption.

YOUR ILLUSTRATIVE RESULT

Formulas & boundaries

Usable diameter D = wafer diameter − 2 × edge exclusion. For die area A, approximate gross dies G = floor(max(0, πD²/(4A) − πD/√(2A))). Good dies per wafer = floor(G × yield / 100).

Wafers required = ceiling(target / good dies per wafer). Fabrication cost per good die = wafer cost / good dies per wafer. Lot fabrication cost = wafers required × wafer cost.

This is a simplified geometric estimate with an edge-loss term, not an exact reticle or die-placement simulation. It ignores die aspect ratio, detailed layout, wafer-level scrap, binning, correlated defects, packaging and test losses. It is not a supplier quote. Defaults are made-up planning assumptions, not measured industry values.